1. Field of Invention
The present invention relates to a circuit controller, and more particularly to a forward converter with a synchronous rectifier that is adapted to resolve problems of reverse current.
2. Description of Related Arts
The traditional forward switching power supplies have been widely used currently, because of its high current output capabilities and simplicity. In order to further improve the conducting loss of diodes and overall efficiency, Synchronous Rectifier (SR) approach is the best choice to replace the diode's function. Although the high conducting loss issue can be resolved in the SR technique mostly, there are other problems coming with this SR technology, which is the reverse current issue. It may occur in a number of the different scenarios, such as cutting off during no load, Over Voltage Protection (OVP) testing during an Automatic Test Equipment (ATE) test, or cutting off during a dynamic test. The reverse current issue is attributed to the different characteristics between a diode and a MOSFET. Wherever the SR converter is used, the reverse current must be manipulated carefully, or the reverse current in the circuit may burn down the MOSFET altogether.
Switching power supplies have been widely used currently because of its simplicity, lower output ripple voltage, and high current output capabilities. Conventionally, the key issue is the power efficiency. A conventional forward converter typically utilizes various diodes to transfer the energy from the input to output. However there is high conducting loss by using diodes.
In order to resolve this high conducting loss problem, the lecture has revealed a technique of Synchronous Rectifier (SR) Metal Oxide Semiconductor Field-Effect Transistor (MOSFET) control circuit to replace the traditional diodes. Although the problem of high conducting loss can e resolved mostly, there are other problems coming with this recent technology. There are different characteristics between a diode and a MOSFET. The examples include uni-directional current flow from the anode to the cathode for a diode, as opposed to a bi-directional current from the drain to source or vice versa. In any event, no matter how the converter operates, the diode can block the reverse current from the output of the converter. But it does not happen to the SR MOSFET. Wherever the SR converter is used, the reverse current must be manipulated very carefully, or the reverse current in the circuit may burn down the MOSFET altogether. This reverse circuit may occur in a number of the different scenarios, such as cutting off during no load, Over Voltage Protection (OVP) testing during to Automatic Test Equipment (ATE) test, or cutting off during the dynamic test.
Referring to FIG. 1 of the drawings, a conventional forward converter with SR control circuit is shown. FIGS. 2A to 2C illustrate the key waveforms of the SR circuit under the following conditions: cutting off during no load, OVA test during an ATE test, a cutting off during dynamic test respectively.
Referring to FIG. 2A of the drawings, it is a cut-off time sequence of a normal SR during no load operation. In this operation, since it is a no load operation, the average output current should be zero but the inductor current must be continuous, thus the reverse current is generated. When the circuit works in an on-duty cycle, the reverse current flows through L1, T1, Q2 and G. Therefore, this reverse current is transferred from the secondary side to the primary side and the current path of the primary side is from the primary ground and Q1 to Vin. On the other hand, the positive current flows to charge L1. Subsequently, when the circuit works in an off-duty cycle, the positive current in L1 is discharged to the output. Because the current of L1 must be continuous, the value of the current of L1 is turned into negative to form the reverse current. This reverse energy is charged from C1, L1, Q3 to G. The energy is stored on L1 until the next on-duty cycle.
When the converter cuts off during no load period, the PWM has no drive signal, and Q1 and Q2 are turned off and Q3 is turned on. Because Vcc of the SR controller still exists, Q3 keeps on until Vcc of the SR controller is diminished to zero. On the other hand, because there is no load in the output, L1 and C1 are resonant until the reverse current disappears on esr of C1 and Rds of Q3. L1 is saturated as short when V0 falls to zero. This reverse current may break down Q3.
Referring to FIG. 2B of the drawings, it is the key waveforms for OVP test during the ATE test. In that situation, an external DC voltage is applied to the output terminal while the converter is kept to work on light loading. Therefore, when the converter is working on the light loading, the average current should be close to zero. If the DC voltage reaches the OVP set point, the converter should be turned off with its internal protection circuit. When the convert starts to test the OVP, the output voltage becomes very high, and for the sake of stability, the duty cycles of the main MOSFET, G1 and the forward MOSFET, G2, become small and the duty cycle of the freewheel MOSFET, G3, becomes large. During this time sequence, L1 is dropped down to produce a large reverse current. The status is similar to the cut-off during no load condition. L1 extracts a lot of current from the external DC source to keep the current stable. Because the external DC source cannot provide so large current for L1 to keep the current stable, it is shut down by its internal over-current protection mechanism. The OVP test item cannot be tested and Q3 also has a chance to be broken by the reverse current.
Referring to FIG. 2C of the drawings, it is the key waveforms with respect to the load transient during dynamic test. When the output load changes from the full loading to light loading, the output voltage changes from low to high. For the reason of the stability, the duty cycle of the main MOSFET, G1, and the forward MOSFET, G2, become small and the duty cycle of the freewheel MOSFET, G3, becomes large. When the output load is in the light loading condition, the average current is zero. The converter is turned off at this particular moment, and it has the similar problem to that of the OVP test, and the reverse current may break down the SR MOSFET.